Speed Camera Control Industrial Automation Applications

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Industrial Automation

Speed Camera Control


  • ESM™ EM4N
  • Embedded System Module
  • PowerPC® MPC8245
  • 2 Fast Ethernet, 2 COMs
  • Graphics, CAN bus etc. in on-board FPGA
  • -40 to +85°C operating temperature
  • Custom carrier board for EM4N
  • Custom IP cores implemented on EM4N
  • JPEG compression algorithm in FPGA
  • ELinOS Embedded Linux

An ESM™ Embedded System Module powered by an MPC8245 running at 266MHz clock frequency is the basis for control of an automated traffic camera system. To make traffic management safer and to achieve a smoother, quieter and calmer traffic flow, computer-controlled multi camera systems are used for speed and red light offenses. Day and night, the cameras automatically photograph vehicles driving through red lights and exceeding a pre-set threshold speed, often monitoring several lanes in parallel. At the start and the end of a road section (with lengths between 500 m and 100 km) a digital image is taken. The intelligent system automatically compares these images by using the details of the vehicle, achieving an extremely high matching percentage. The speed of the vehicle is calculated by using time measurement. Offense images captured can be downloaded to a computer or back office. Captured images are securely encrypted to ensure that they are tamperproof.

Two Fast Ethernets and two COMs are already implemented on the ESM™. All other I/O connectivity is realized on an application-specific ESM™ carrier board. The overall solution is very compact in order to fit inside the small camera housing and it is qualified for -40 to +85°C operation temperature according to the climatic conditions of an outside installation. The additional functionality is implemented by means of IP cores in the FPGA which is located on the ESM™ module. This functionality comprises standard IP cores like additional COMs, IDE, interrupt controller, or a separate watchdog for system reset. It also comprises very application-specific IP cores like the camera interface and a highly optimized compression algorithm which does the complete frame grabbing and encryption in the FPGA without loading the processor.

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