F206 - 3U CompactPCI® Octal UART for RS232, RS422, RS485

Accessible via onboard connectors

Physical interface at front panel using SA-Adapters™ via 10-pin ribbon cable

Different variations with SA-Adapters™ possible:
• RS232
• RS422
• RS485

Data rates up to 2 Mbit/s

60-byte transmit/receive buffer

Handshake lines: full support; lines depend on SA-Adapters™

FPGA

Standard factory FPGA configuration:
• Main bus interface
• 16Z054_SYSTEM - System unit
• 16Z025_UART - UART controller (controls four UARTs)
• 16Z025_UART - UART controller (controls four UARTs)
• 16Z045_FLASH - Flash interface

The FPGA offers the possibility to add customized I/O functionality. See FPGA.

Option matrix showing possible IP cores and SA-Adapters™ (PDF)

Miscellaneous

Four status LEDs

Local PCI Bus

32-bit/33-MHz, 3.3 V V(I/O)

Compliant with PCI Specification 2.2

CompactPCI® Bus

Compliance with CompactPCI® Core Specification PICMG 2.0 R3.0

Peripheral slot

V(I/O): +3.3 V

Electrical Specifications

Supply voltage/power consumption:
• +5 V (-3%/+5%), current depends only on mounted SA-Adapters™
• +3.3 V (-3%/+5%), > 500 mA typ.

Mechanical Specifications

Dimensions: conforming to CompactPCI® specification for 3U boards

Single 3U front panel slot for up to two UARTs

Up to two supplementary front panel slots required for overall eight UARTs

Front panel: aluminum with 1 handle

Weight: 95 g

Environmental Specifications

Temperature range (operation):
• -40..+85°C (qualified components)
• Airflow: min. 1.0 m/s

Temperature range (storage): -40..+85°C

Relative humidity (operation): max. 95% non-condensing

Relative humidity (storage): max. 95% non-condensing

Altitude: -300 m to +3000 m

Shock: 15 g, 11 ms (EN 60068-2-27)

Bump: 10 g, 16 ms (EN 60068-2-29)

Vibration (sinusoidal): 1 g, 10 Hz - 150 Hz (EN 60068-2-6)

Conformal coating on request

MTBF

308 000 h @ 40°C (derived from MIL-HDBK-217F)

Safety

PCB manufactured with a flammability rating of 94V-0 by UL recognized manufacturers

EMC

Tested according to EN 55022 (radio disturbance), IEC 61000-4-2 (ESD) and IEC 61000-4-4 (burst)

Software Support

Driver software for Windows®, Linux, VxWorks®, QNX®

Flash update tools for Windows®, Linux, VxWorks®

For more information on supported operating system versions and drivers see Downloads.

Flexible Configuration

Customized I/O functions can be added to the FPGA.

It depends on the board type, pin counts and number of logic elements which IP cores make sense and/or can be implemented. Please contact MEN for information on feasibility.

You can find more information on our web page "User I/O in FPGA"

FPGA Capabilities

FPGA Altera® Cyclone® EP1C12
• 12 060 logic elements
• 239 616 total RAM bits

For UART functions

2 MB Flash for FPGA configurations

Connection
• Total available pin count: 64 pins
• Functions available via onboard I/O connectors
• SA-Adapters™ are used to realize the physical lines.

Functional updates via software
• MEN offers Flash update tools for different operating systems.

Option matrix showing possible IP cores and SA-Adapters™ (PDF)

Different variations possible through FPGA IP cores and SA-Adapters™:
• RS232
• RS422
• RS485
• IBIS master/slave
• CAN bus
• HDLC
• Binary I/O
• InterBus-S
• GPS
• Other physical layers dependent on FPGA configuration
• Option matrix showing possible IP cores and SA-Adapters™ (PDF)

Mechanical

4, 8 or 12 HP front panel dependent on number of SA-Adapters™
• 4 HP with 2 onboard SA-Adapters™
• 8 HP with 5 SA-Adapters™
• 12 HP with 8 SA-Adapters™

One-piece front panel

Different front panel cut-outs possible

Cooling Concept

Also available with conduction cooling in MEN CCA frame

Please note that some of these options may only be available for large volumes. Please ask our sales staff for more information.

Article No.	Description	More
Linux
This product is designed to work under Linux. See below for potentially available separate software packages from MEN.
13Z017-06	MDIS5™ low-level driver sources (MEN) for 16Z034_GPIO and 16Z037_GPIO Requires an MDIS4™/2004 or MDIS5™ system package	Download Details
13Z025-90	Linux native driver (MEN) for 16Z025_UART, 16Z057_UART and 16Z125_UART	Download Details
13Z055-90	Linux native driver (MEN) for 16Z055_HDLC with TCP/PPP support	Download Details
13Z100-91	Linux FPGA update tool (MEN)	Download Details
Windows
This product is designed to work under Windows®. See below for potentially available separate software packages from MEN.
10Y000-78	Windows® Embedded Standard 7 BSP for F11S, F19P, F21P, G20, XM1L, XM2, MM1, MM2, SC21, SC24, BC50M, F206, F210, F215, F216, G215, P506, P507 and P511	Download Details
13F206-70	Windows® Installset (MEN) for F206 Includes all free drivers developed by MEN for the supported hardware.	Download w/o System Package Download with System Package Details
13Z100-70	Windows® FPGA update tool (MEN)	Download Details
VxWorks
This product is designed to work under VxWorks®. For details regarding supported/unsupported board functions please refer to the corresponding software data sheets.
13Z017-06	MDIS5™ low-level driver sources (MEN) for 16Z034_GPIO and 16Z037_GPIO Requires an MDIS4™/2004 or MDIS5™ system package	Download Details
13Z025-60	VxWorks® native driver (MEN) for 16Z025_UART, 16Z057_UART and 16Z125_UART	Download Details
13Z100-60	VxWorks® FPGA update tool (MEN)	Download Details
QNX
This product is designed to work under QNX®. For details regarding supported/unsupported board functions please refer to the corresponding software data sheets.
13Z017-06	MDIS5™ low-level driver sources (MEN) for 16Z034_GPIO and 16Z037_GPIO Requires an MDIS4™/2004 or MDIS5™ system package	Download Details
13Z025-40	QNX® 6.3 native driver (MEN) for 16Z025_UART and 16Z125_UART	Download Details
13Z025-41	QNX® 6.4 native driver (MEN) for 16Z025_UART and 16Z125_UART	Download Details
13Z025-42	QNX® 6.5 native driver (MEN) for 16Z025_UART and 16Z125_UART	Download Details
13Z100-40	QNX® FPGA update tool (MEN)	Download Details

For operating systems not mentioned here contact MEN sales.