10PP01-61 VxWorks® 6.1 BSP for PP1

Revision History

-----[ PP01_BSP_VX6.3_BSP2_0_2 ]-----
[ 2006-07-17 13:55:27 by ufranke ]
BSP 2.0/2
 added
  + m5200FecEnd_vx6_3.a ethernet driver binary for VxWorks 6.3

-----[ PP01_VX6.2_BSP_2_0_2 ]-----
[ 2006-07-17 13:00:03 by ufranke ]
BSP 2.0/2 for VxWorks 6.2
 added
  + OSS_VxMikroDelayReInit() for readjusting OSS_MikroDelay() after cache enable
  + saveing  starttype for ED&R sysALib.s
 changed
  - linking against oss.a, dbg.a instead of _oss_stubX.o
  - added sub directories for VxWorks Version i.e. vxWorks-6.2
  - undef INCLUDE_WINDVIEW to build bootstrapper without editing config.h
  - renamed sysEnetAddrGet() to sysFecEnetAddrGet()
 fixed
  - sometimes netTask exception happens due to
    driver restart after RX FIFO overflow merged WRS SPR
  - /flash_raw was'nt initialized for VxWorks 6.2
  - adapted for new ethernet driver
  - check nspeed0 of MENMON second edition correctly

-----[ PP01_VX6.2_BSP_2_0_1 ]-----
[ 2006-05-18 10:47:53 by ufranke ]
BSP 2.0/1 supporting VxWorks 6.2
 changed
  - the ethernet driver must match the VxWorks version
    select one by copying m5200FecEnd_vx6_1.a or m5200FecEnd_vx6_2.a
    into m5200FecEnd.a
  - network can be disabled completly by
    undef STANDALONE_NET
  - enabled PPC603 core dynamic power management
 added
  + sysRomFs.c example configuration for ROM FS at
    start of 16 MB FLASH 0xff000000
 fixed
  - creating rom images - elfToBin replaced by objcopyppc
  - PCI external busmasters deadlock
    it works on the MPC5200 B3 if all XLB arbiter priorities are equal
  - inlcude pp01_cfg.h instead of em01_cfg.h

-----[ PP01_VX6.1_BSP_2_0_0 ]-----
[ 2006-03-10 15:34:08 by UFRANKE ]
BSP 2.0/0 supporting VxWorks 6.1
 added
  + USB
  + FRAM precharge timing woraround
  + sysGetSvr/Pvr()
  + set glitch filter for MPC5200B
 fixed
  - i28f000.c problem if knownSize < chipSize
    resetAll takes no effect after writing to flash
  - DBG_Show() for VxWorks 6.x
  - MPC5200 Intr Status Register work around:
 changed
  - ethernet BestCOMM from 1.1 to 2.2
    display VxWorks version compiled for
  - enable pipelineing
  - cache coherency protocol for SDRAM
  - workaround for PCI config access behind a bridge
    disabled for MPC5200B
  - disable RTP(user mode) data and instruction access from/to I/O
  - main memory > 64MB will be mapped by PTE
    not longer by BAT's
    sysRealPhysMem() adapt RAM size in sysPhysMemDesc for MMU mapping

-----[ VX_6_1_Beta_1 ]-----
[ 2005-10-05 12:50:08 by UFranke ]
Initial Revision

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