14PP01-00 MENMON™ (Firmware) for PP1 (binary code)

Revision History

===== [ History of fileset ART/14PP01-00/14PP01-00 ] =====
 
 -----[ PP01_MM_2_3 ]-----
 [ 2007-08-30 16:12:29 by ufranke ]
 MM PP01 2.3
  PMM - 14PP01-00_02_03.pmm
  SMM - 14PP01-00_02_03.smm
  fixed
   - ethernet problems on some PP01 (TFTP boot hangs)
     disable XLB pipelinig and renable at jumping ot OS
 
 -----[ PP01_MM_2_2 ]-----
 [ 2006-02-27 13:55:30 by UFRANKE ]
 MM PP01 2.2
  PMM - F1147020
  SMM - F1147021
  added
   + MPC5200B IIC glitch filter setup
   + command LM81
   + FEC restart at FIFO error
  changed
   - ethernet to BestCOMM firmware version 2.2
   - enable pipelining (clear MGT5200_XLBARB_CTRL__PIPELINE_DIS)
   - MPC5200 SRAM usage F0008000..8400 and F000AF80.. F000BFFF
   - reset cause and watchdog test state structure loacation
     from 0xF000BFD0 to 0xF0008400 because BestCOMM 2.2 integration
  fixed
   - SDRAM TAP for the MPC5200B (MBAR+0x190=0x00000004)
   - workaround FRAM precharge violation added
 
 -----[ PP01_MM_2_1 ]-----
 [ 2006-01-20 16:26:16 by UFRANKE ]
 for PP01 model 05..07 with 128MB MENMON™ 2.1
  PMM - F1144020
  SMM - F1144021
 added
  + show CPU revision in logo
  + MPC5200 B support (increased XLB/MEM clock from 64 MHz to 128 MHZ)
    (tune IPB clock always to 64 MHz independently if XLB is 64 or 128 MHz )
  + ethernet device EEPRO100 support for MPC5200 B
    ( PCI busmaster works with MPC5200 B3 )
 changed
  - max PCI retries from 255 to infinite
  - perform access through SCPCI only on MPC5200 Rev. A
 fixed
  - stop boot if ABORT pin is active
 
 -----[ PP01_MM_2_0 ]-----
 [ 2005-06-23 17:46:03 by UFranke ]
 for PP01 model 05..07 with 128MB MENMON™ 2.1
 PP01 MENMON™ 2.0
  - completely reworked -> switched to Hurricane MENMON™
  added
  - FTP, TELET and PING support
  - loading PP02/KD12 FPGA's
  - 32/128 MB SDRAM autodetection
  - WATCHDOG selftest
  - WATCHDOG selftest disable via ee-stdis_wdog 1
  changed
  - due to automap PP02/KD12
   new mapping
   0x 0  0x14  0x 0   0x5104  0x1172  0x80000000 (0x00002000)
                                      0x80002000 (0x00002000)
                                      0x80004000 (0x00002000)
   0x 0  0x15  0x 0   0x8002  0x1172  0x80006000 (0x00002000)
   old mapping
   0x 0  0x14  0x 0   0x5104  0x1172  0x80002000 (0x00002000)
                                      0x80004000 (0x00002000)
                                      0x80006000 (0x00002000)
   0x 0  0x15  0x 0   0x8002  0x1172  0x80000000 (0x00002000)
  fixed
   - Primary MENMON™ is able to update 16MB FLASH
 
 
 -----[ R-1.2 ]-----
 [ 2004-09-16 14:47:42 by ufranke ]
 
 MM 1.2 PMM F1114010 SMM F1115010
 
 changed
  - lower limit of 5V voltage supervision decreased by 0.2V
  - SERDL file extension can be bigger than .f99 i.e. .f123456
 
 -----[ R-1.1 ]-----
 1.2  18.05.2004 17:21:33 by UFranke
 MM 1.1 PMM F1108010 SMM F1109010 for PP01 R02
 
 added
  + 8/16MB FLASH autodetection
  + 32/33/ 33.33 MHz in clock autodetection
  + NDL for network download
  + ABORT switch to start PMM or restore EEPROM defaults
  + reset cause counter in FRAM
  + EE-nspeed, EE-ntry for NBOOT
 
 changed
  - relocated code/data now at 1F00000
  - NBOOT download area increased from 14 to 15 MB
 
 fixed
  - MENMON™ protection in PFLASH command
  - init FPU and segment registers
  - power error reset clear at power on
 
 -----[ R-1.0 ]-----
 MM 1.0
 1.1  30.04.2003 10:29:55 by UFranke
 Initial Revision
 

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