13P010-60 VxWorks® UART driver (MEN) for P10 and P11

Revision History

-----[ Revision 1.7 ]-----
[ 2009-09-30 15:12:48 by cs ]
R:1. driver always wrote 16 bytes only to Tx FIFO, rest of FIFO unused
  2. add support for controlling the use level of the Tx FIFO
M:1. use FIFO size and TFL for determining num of bytes to write to Tx FIFO
  2.a) support ioctl code P10_TX_FIFO_SIZE
    b) set default Tx FIFO use level (0x40)

-----[ Revision 1.6 ]-----
[ 2006-09-15 07:28:10 by cs ]
added support for EM3 family (85XX)
fixed:
   - using P10_AUTO_XONXOFF disabled FIFOs due to wrong register access
   - corrected XON/XOFF characters from 0x17/0x19 to 17/19
   - finished changes made for PPC85XX so driver works for common PPC603

-----[ Revision 1.5 ]----- 
[ 2005-07-28 19:45:23 by CSchuster ] 
File /_CVS_/VXWORKS/DRIVERS/NATIVE/P10/EEPROM/mk.bat RCS 1.1 -> RCS 1.2
   PPC603 now default 
File /_CVS_/VXWORKS/DRIVERS/NATIVE/P10/EEPROM/oxprom.c RCS 1.1 -> RCS 1.2 
   bugfix 
     -address cast to UINT16 removed 
File /_CVS_/VXWORKS/DRIVERS/NATIVE/P10/p10_drv.c RCS 1.3 -> RCS 1.6 
   added support for onboard OX16PCI954 chips (e.g. 01A500) 
   added support for PPC603 (different memory offsets) 
   cosmetics for Tornado® 2.2 
     -removed warings of the Tornado® 2.2 GNU compiler  


-----[ Revision 1.4 ]----- 
[ 2003-04-10 09:25:14 by UFranke ] 
added 
 +p10.inc - -> catmap:public=public 


-----[ Revision 1.3 ]----- 
[ 2002-04-30 12:43:06 by Franke ] 
added SIO_BAUD_SET  


-----[ Revision 1.2 ]----- 
[ 2002-04-24 15:52:03 by Franke ] 
added 
 - console support at boot initialization 
 - runtime support for MPC106 MAP-A/MAP-B by p10Drv_CpuToPciMem/Io 
 - p10DrvId() 
replaced 
 - sysIntEnable by intEnable 
changed 
 - P10_MAX_UNITS from 8 to 2 
removed 
 - PCI2DRAM_BASE_ADRS  


-----[ Revision 1.1 ]----- 
[ 2000-03-14 14:39:57 by loesel ] 
Initial Revision

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