AFDX/ARINC-664 Interface PMC
The P522 meets all AFDX safety and performance requirements, which makes it ideal for safety-critical inflight data transfer. The PMC module supports two full duplex AFDX networks based on standard IEEE 802.3 Ethernet technology and applies protocol stack implementation. Up to 256 fully separated receive VLs and 64 transmit VLs allow for reliable packet transport and bounded transport latency.
The FPGA internal ARM CPU can be used for services to offload host CPU. It is not required to execute the AFDX protocol and is separated from the rest of the protocol engine. Therefore, this configuration can be used for quite flexible designs, as well as very compact integrated AFDX solutions.
The architecture of the P522 is based on the flash based FPGA CS1, which reduces development costs, secures long-term availability and makes the whole interface very flexible as customized I/O functionality can be added anytime. The CS1, which can be ordered as an individual chip, can be installed directly onto a large variety of boards to build an AFDX end system, and eliminates the need for an additional module.
The PMC module is certifiable to the critical safety level DAL-D, according to the avionics guidelines (DO-254).
The P522 is a PMC I/O mezzanine card suitable for any PMC compliant host carrier board.