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Feb 03, 2017

Star Topology of CompactPCI Serial and CompactPCI PlusIO

Both PICMG 2.30 – the rear I/O definition of CompactPCI – and the extension of CompactPCI standard CPCI-S.0 are based on a star topology.

CompactPCI still uses the parallel PCI bus for communication between the system and peripheral boards. The maximum transmission speed of a parallel bus, however, is limited. Every additional board needs to share the bandwidth with the other bus participants.

Also, the boards influence each other. Each one of the up to eight participants increases the electrical load on the bus, also reducing the theoretical maximum bandwidth of 33 MHz/32 bits with a peak data rate of 132 MB/s. If you increase the bus frequency to 133 MHz/64 bits (PCI-X), the maximum data rate goes up to 1 GB/s with only two possible participants – which is already a point-to-point connection with many lines.

Modern architectures are no longer busses but point-to-point connections. Their electrical characteristics are easier to manage and they permit higher data transmission rates with less pins. With just one link (i.e. one differential receive and one transmit line), PCI Express already achieves 250 MB/s. The bandwidth of this connection is not restricted by other bus participants. There is no direct influence. A higher number of links for a connection or a higher clock frequency further increase the data rate (up to 16 GB/s with Gen3) – and all this with full duplex.

Classic computers such as PCs have a hierarchical structure. At its "center" there is the computer that is surrounded by peripherals like the points of a star. This is independent of how the peripherals are controlled: via PCI Express, USB or SATA. Ethernet is an exception – for that the CompactPCI Serial specification defines a completely new feature (more in the next article about the CompactPCI Serial Mesh Architecture).

If you project this architecture to modular computers like CompactPCI, there are a few technical challenges for the system slot and the backplane. Because of the star topology, the system slot must now provide a large number of connections. The backplane must spread all of these connections to the peripheral slots without needing too many layers.

In the end, the price of modular computers must be able to compete with classic standard solutions. Standards like µTCA have defined switched fabric slots for this reason. These route the data over special backplanes as desired.

CompactPCI Serial intentionally does without such mechanisms. Its architecture does not need switches. The system slot is the center of the star. Each peripheral board is a symmetrical point. This is inexpensive and simple but assumes suitable connectors – which are now also available in rugged designs.

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