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P598 - Conduction-Cooled FPGA-based USM Main PMC
 

PCI Mezzanine Card

This product has been discontinued.

The P598 is a conduction-cooled USM main mezzanine PMC with onboard FPGA.

Download data sheet

  • P598 Product ImageP598 Conduction-Cooled FPGA-based USM Main PMC
  • P598 Product Image

Main Features

  • Main PMC for USM Universal Submodules
  • Conduction-cooled (CCPMC)
  • 1 USM slot
  • 1 FPGA 33,216 LE (for user-defined I/O and Nios soft core)
  • 32 MB DDR2 SDRAM
  • 2 MB Flash
  • -40 to +85°C with qualified components
P598 Product Image

Technical Data

Functionality
  • User-defined through FPGA
  • Line drivers and/or additional hardware implemented on USM Universal Submodule (not included)
Memory
  • 32MB SDRAM memory
    • Soldered
    • DDR2
    • 132MHz memory bus frequency
    • FPGA-controlled
  • 2MB non-volatile Flash
    • For FPGA data and Nios firmware
    • FPGA-controlled
FPGA
  • Standard factory FPGA configuration:
    • Main bus interface
    • Altera SOPC Unit incl. Nios II/f soft processor, GPIO, UART and DDR2 SDRAM control
    • Wishbone-to-Avalon/Avalon-to-Wishbone bridges
    • Chameleon Table V2
    • Interrupt controller, SMBus controller
    • PCI to Wishbone bridge, ID EEPROM emulation
    • 16Z045_FLASH - Flash interface
    • 16Z034_GPIO - GPIO controllers (2 IP cores, for onboard LEDs and 8-bit I/O)
  • The FPGA offers the possibility to add customized I/O functionality. See FPGA.
USM Slot
  • One slot for a standard USM module
  • For implementation of line drivers and/or additional hardware
Miscellaneous
  • Eight onboard LEDs, FPGA-controlled
  • I²C interface to detect the USM module
PMC Characteristics (PCI)
  • Compliant with PCI Specification 2.2
  • 32-bit/33-MHz, 3.3V V(I/O)
  • Target
Peripheral Connections
Via Pn4 rear I/O connector
Electrical Specifications
  • Isolation voltage:
    • Voltage depends on implementation and signal routing of USM
  • Supply voltage/power consumption:
    • +5V (-3%/+5%), FPGA idle / US0 plugged: approx. 118mA, memory test / US0 plugged: 122mA
    • +3.3V (-5%/+5%), FPGA idle / US0 plugged: 76mA, memory test / US0 plugged: 82mA
  • MTBF: 848,597h @ 40°C according to IEC/TR 62380 (RDF 2000)
Mechanical Specifications
  • Dimensions: conforming to IEEE 1386.1
  • In accordance with VITA 20 (proposed Draft Standard for Conduction Cooled PMC)
  • Weight: 36g (w/o USM module)
Environmental Specifications
  • Temperature range (operation):
    • -40..+85°C (qualified components), conduction-cooled
    • Airflow: min. 10m³/h
  • Temperature range (storage): -40..+85°C
  • Relative humidity (operation): max. 95% non-condensing
  • Relative humidity (storage): max. 95% non-condensing
  • Altitude: -300m to + 3,000m
  • Shock: 15g/11ms
  • Bump: 10g/16ms
  • Vibration (sinusoidal): 2g/10..150Hz
  • Conformal coating on request
Safety
PCB manufactured with a flammability rating of 94V-0 by UL recognized manufacturers
EMC
  • Radio disturbance: no connection outside housing, therefore radio disturbance not relevant
  • ESD/burst: no external interface connector, therefore ESD and burst not relevant
Software Support
  • Flash update tools for Linux, Windows, VxWorks, QNX
  • Driver software depending on implemented FPGA functions
  • For more information on supported operating system versions and drivers see Software.

FPGA

FPGA Capabilities
  • FPGA Altera Cyclone II EP2C35
    • 33,216 logic elements
    • 483,840 total RAM bits
    • Supports Nios II soft processor
  • Connection
    • Functions can be linked to Wishbone or Avalon bus
    • Available pin count: 46 pins (FPGA to USM)
    • Functions available via USM at rear I/O connector
  • MEN offers an FPGA Development Package as well as Flash update tools for different operating systems.
    • Package comes with function-identical convection-cooled PMC module with front I/O
    • Only for development of FPGA, independent of conduction cooling

Ordering Information

Software

Linux
13MD05-90

MDIS5 System (and Device Driver) Package (MEN) for Linux. This software package includes most standard device drivers available from MEN.

13Z100-91

Linux FPGA update tool (MEN)

Windows
13Y018-70

Windows 64-bit FPGA update tool (MEN)

VxWorks
13Z017-06

MDIS5 low-level driver sources (MEN) for 16Z034_GPIO, 16Z037_GPIO and 16Z127_GPIO

13Z100-60

VxWorks FPGA update tool (MEN)

QNX
13Z017-06

MDIS5 low-level driver sources (MEN) for 16Z034_GPIO, 16Z037_GPIO and 16Z127_GPIO

13Z100-40

QNX FPGA update tool (MEN)

FPGA
16P599-00

Nios PMC USM FPGA Development Package (MEN) (without Altera Quartus II) (license included in PMC USM FPGA Development Kit)

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