16Z073_QDEC - Quadrature Decoder
FPGA IP Core
The 16Z073_QDEC is a quadrature decoder IP core which can be used to interface a rotary encoder switch with 2-bit quadrature coded output and with an optional pushbutton switch.
- Logic elements (Altera Cyclone device family): 100 typ.
- Pin count min: 2
- Pin count max: 3
- Wishbone bus interface compliant with Wishbone Specification B.3
- 32-bit data transfer, 33MHz bus frequency
- Supported Wishbone bus cycles
- Single read/write
- Input for quadrature encoder
- 90 degress phase-shifted signals A and B
- Push-button signal