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16Z042_LPC - LPC to Wishbone Bridge

FPGA IP Core

The LPC to Wishbone Bridge is used to convert LPC bus accesses from an I/O controller to the wishbone bus internally used in the FPGA. It can be used to access standard interfaces like serial interfaces, floppy disk controller or parallel ports.

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Main Features

  • FPGA IP core
  • Wishbone bus interface
  • Conversion of LPC bus accesses
16Z042_LPC Product Image

Technical Data

Size
  • Logic elements (Altera Cyclone device family): 260 typ.
  • Pin count: 13
System-Bus Interface
  • Wishbone bus interface compliant with Wishbone Specification B.3
  • 32-bit data transfer, 33MHz bus frequency
  • Supported Wishbone bus cycles
    • Single read/write
  • Access to up to 8 Wishbone slaves
LPC Functionality
  • LPC Slave interface
  • No LPC bus master functionality support
  • Access to serial interfaces, floppy disk controller, parallel ports
  • Access to COM ports in Embedded System Modules
  • Memory read/write and I/O read/write operations
  • Byte mode
  • No DMA support

Ordering Information

Documentation