Extbase Variable Dump
array(empty)
SDRAM Controller IP Core - MEN
 Log in/Register News & Media | Downloads | Corporate | Careers | Contact Request
+49 911 99 33 5-0
info@men.de

16Z043_SDRAM - SDRAM Controller

FPGA IP Core

This product is an SDRAM controller for FPGA to SDRAM interfaces. The main functionality is to connect the Wishbone bus to SDRAM memory, with up to 133 MHz clock frequency. Single and burst transactions are supported.

Download data sheet

Main Features

  • FPGA IP Core
  • Supports up to 133 MHz clock frequency
  • Single and burst transactions
  • Wishbone bus interface
16Z043_SDRAM Product Image

Technical Data

Size
  • Logic elements (Altera Cyclone device