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16Z048_ISA - Wishbone to ISA Interface

FPGA IP Core

The Wishbone to ISA Interface is used to access simple ISA devices via the PCI bus. Accesses via the PCI bus in I/O mapped address space are converted into Wishbone accesses by the PCI to Wishbone bridge IP core 16Z014_PCI.

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Main Features

  • FPGA IP Core
  • Accesses simple ISA devices via the PCI bus
  • Supports 8/16-bit read/write access
  • Wishbone bus interface
16Z048_ISA Product Image

Technical Data

Size
  • Logic elements (Altera Cyclone device family): 245 typ.
  • Pin count min: 48
  • Pin count max: 66
System-Bus Interface
  • Wishbone bus interface compliant with Wishbone Specification B.3
  • 32-bit data transfer, 33MHz bus frequency
  • Supported Wishbone bus cycles
    • Single read/write
Functionality
  • Wishbone to ISA bridge
  • 8-/16-bit I/O read/write accesses
  • 8-/16-bit memory read/write accesses

Ordering Information

Documentation

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