16Z048_ISA - Wishbone to ISA Interface
FPGA IP Core
The Wishbone to ISA Interface is used to access simple ISA devices via the PCI bus. Accesses via the PCI bus in I/O mapped address space are converted into Wishbone accesses by the PCI to Wishbone bridge IP core 16Z014_PCI.
- Logic elements (Altera Cyclone device family): 245 typ.
- Pin count min: 48
- Pin count max: 66
- Wishbone bus interface compliant with Wishbone Specification B.3
- 32-bit data transfer, 33MHz bus frequency
- Supported Wishbone bus cycles
- Single read/write
- Wishbone to ISA bridge
- 8-/16-bit I/O read/write accesses
- 8-/16-bit memory read/write accesses