16Z056_SPI - SPI Controller
FPGA IP Core
The SPI Master can be adjusted by Generics to different ICs with SPI interface available on the market. The SPI has got two types of interfaces: The Wishbone bus and the serial interface.
- Logic elements (Altera Cyclone device family): 200 typ.
- Pin count: 4
- Wishbone bus interface compliant with Wishbone Specification B.3
- 32-bit data transfer, 33MHz bus frequency
- Supported Wishbone bus cycles
- Single read/write
- Three parallel data lines
- Master out Slave in (MOSI)
- Master in Slave out (MISO)
- Serial clock
- Configurable through Generics